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feat: Add Intel e1000e PCIe NIC, VirtIO-GPU 2D accelerator, CPUFreq governor, and VirtIO-Input drivers
- Implement Intel 82574L / 82567LM / I217 / I219 PCIe Gigabit NIC driver with DMA ring buffers and auto-negotiation in drivers/net/e1000e.c and include/drivers/e1000e.h - Implement VirtIO-GPU 2D hardware graphics display adapter driver with dirty rect flushing in drivers/virtio/virtio_gpu.c and include/drivers/virtio_gpu.h - Implement Dynamic CPU Frequency Scaling and ACPI CPPC Power Governor with performance, powersave, ondemand, conservative, and schedutil policies in drivers/power/cpufreq.c and include/drivers/cpufreq.h - Implement VirtIO-Input para-virtualized tablet/mouse event driver in drivers/virtio/virtio_input.c and include/drivers/virtio_input.h - Expand stage2 kernel bootloader loading boundary to 768 KB (1536 sectors) - Add LazyBox applets: 'cpufreq', 'gpuinfo', 'e1000e' - Verified across x86_64, AArch64, and ARMv8i targets
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// Intel e1000e PCIe Gigabit Network Adapter Driver (82574L / 82567LM / I217 / I219)
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#include <drivers/e1000e.h>
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#include <drivers/pci.h>
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#include <net/net.h>
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#include <mm/kmalloc.h>
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#include <mm/pmm.h>
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#include <arch/x86_64/isr.h>
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#include <arch/x86_64/pic.h>
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#include <arch/x86_64/io.h>
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#include <lib/string.h>
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#include <kernel/printk.h>
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#define REG_CTRL 0x0000
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#define REG_STATUS 0x0008
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#define REG_EECD 0x0010
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#define REG_EERD 0x0014
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#define REG_ICR 0x00C0
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#define REG_ITR 0x00C4
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#define REG_ICS 0x00C8
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#define REG_IMS 0x00D0
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#define REG_IMC 0x00D8
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#define REG_RCTL 0x0100
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#define REG_RDBAL 0x2800
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#define REG_RDBAH 0x2804
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#define REG_RDLEN 0x2808
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#define REG_RDH 0x2810
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#define REG_RDT 0x2818
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#define REG_TCTL 0x0400
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#define REG_TDBAL 0x3800
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#define REG_TDBAH 0x3804
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#define REG_TDLEN 0x3808
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#define REG_TDH 0x3810
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#define REG_TDT 0x3818
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#define REG_RAL0 0x5400
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#define REG_RAH0 0x5404
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#define RCTL_EN (1 << 1)
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#define RCTL_SBP (1 << 2)
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#define RCTL_UPE (1 << 3)
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#define RCTL_MPE (1 << 4)
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#define RCTL_BAM (1 << 15)
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#define RCTL_BSIZE_2K (0 << 16)
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#define RCTL_SECRC (1 << 26)
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#define TCTL_EN (1 << 1)
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#define TCTL_PSP (1 << 3)
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#define NUM_RX_DESCRIPTORS 32
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#define NUM_TX_DESCRIPTORS 16
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#define RX_BUFFER_SIZE 2048
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typedef struct {
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uint64_t buffer_addr;
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uint16_t length;
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uint16_t checksum;
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uint8_t status;
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uint8_t errors;
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uint16_t special;
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} __attribute__((packed)) e1000e_rx_desc_t;
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typedef struct {
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uint64_t buffer_addr;
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uint16_t length;
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uint8_t cso;
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uint8_t cmd;
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uint8_t status;
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uint8_t css;
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uint16_t special;
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} __attribute__((packed)) e1000e_tx_desc_t;
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static pci_device_t* e1000e_pci_dev = NULL;
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static uint64_t mmio_base = 0;
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static bool is_online = false;
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static uint8_t mac_addr[6] = {0x52, 0x54, 0x00, 0x82, 0x57, 0x4E};
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static e1000e_rx_desc_t* rx_descriptors = NULL;
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static uint8_t* rx_buffers[NUM_RX_DESCRIPTORS];
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static uint16_t rx_cur = 0;
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static e1000e_tx_desc_t* tx_descriptors = NULL;
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static uint8_t* tx_buffers[NUM_TX_DESCRIPTORS];
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static uint16_t tx_cur = 0;
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static uint64_t stats_rx_packets = 0;
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static uint64_t stats_tx_packets = 0;
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static uint64_t stats_rx_bytes = 0;
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static uint64_t stats_tx_bytes = 0;
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static inline void write_reg(uint32_t reg, uint32_t val) {
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if (mmio_base) {
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volatile uint32_t* p = (volatile uint32_t*)(mmio_base + reg);
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*p = val;
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}
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}
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static inline uint32_t read_reg(uint32_t reg) {
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if (mmio_base) {
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volatile uint32_t* p = (volatile uint32_t*)(mmio_base + reg);
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return *p;
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}
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return 0;
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}
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static uint16_t read_eeprom(uint8_t addr) {
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uint32_t val = (uint32_t)addr << 8 | 1;
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write_reg(REG_EERD, val);
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for (int i = 0; i < 1000; i++) {
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uint32_t status = read_reg(REG_EERD);
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if (status & (1 << 4)) {
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return (uint16_t)((status >> 16) & 0xFFFF);
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}
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}
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return 0;
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}
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static void e1000e_read_mac(void) {
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uint16_t val = read_eeprom(0);
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if (val != 0 && val != 0xFFFF) {
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mac_addr[0] = val & 0xFF;
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mac_addr[1] = (val >> 8) & 0xFF;
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val = read_eeprom(1);
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mac_addr[2] = val & 0xFF;
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mac_addr[3] = (val >> 8) & 0xFF;
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val = read_eeprom(2);
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mac_addr[4] = val & 0xFF;
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mac_addr[5] = (val >> 8) & 0xFF;
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} else {
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uint32_t ral = read_reg(REG_RAL0);
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uint32_t rah = read_reg(REG_RAH0);
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if (ral != 0) {
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mac_addr[0] = ral & 0xFF;
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mac_addr[1] = (ral >> 8) & 0xFF;
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mac_addr[2] = (ral >> 16) & 0xFF;
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mac_addr[3] = (ral >> 24) & 0xFF;
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mac_addr[4] = rah & 0xFF;
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mac_addr[5] = (rah >> 8) & 0xFF;
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}
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}
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}
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static void e1000e_rx_init(void) {
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size_t ring_size = sizeof(e1000e_rx_desc_t) * NUM_RX_DESCRIPTORS;
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rx_descriptors = (e1000e_rx_desc_t*)kzalloc(ring_size);
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for (int i = 0; i < NUM_RX_DESCRIPTORS; i++) {
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rx_buffers[i] = (uint8_t*)kmalloc(RX_BUFFER_SIZE);
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rx_descriptors[i].buffer_addr = (uint64_t)rx_buffers[i];
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rx_descriptors[i].status = 0;
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}
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write_reg(REG_RDBAL, (uint32_t)((uint64_t)rx_descriptors & 0xFFFFFFFF));
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write_reg(REG_RDBAH, (uint32_t)(((uint64_t)rx_descriptors >> 32) & 0xFFFFFFFF));
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write_reg(REG_RDLEN, ring_size);
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write_reg(REG_RDH, 0);
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write_reg(REG_RDT, NUM_RX_DESCRIPTORS - 1);
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rx_cur = 0;
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write_reg(REG_RCTL, RCTL_EN | RCTL_SBP | RCTL_UPE | RCTL_MPE | RCTL_BAM | RCTL_BSIZE_2K | RCTL_SECRC);
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}
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static void e1000e_tx_init(void) {
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size_t ring_size = sizeof(e1000e_tx_desc_t) * NUM_TX_DESCRIPTORS;
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tx_descriptors = (e1000e_tx_desc_t*)kzalloc(ring_size);
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for (int i = 0; i < NUM_TX_DESCRIPTORS; i++) {
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tx_buffers[i] = (uint8_t*)kmalloc(RX_BUFFER_SIZE);
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tx_descriptors[i].buffer_addr = (uint64_t)tx_buffers[i];
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tx_descriptors[i].status = 1; // Descriptor done
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tx_descriptors[i].cmd = 0;
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}
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write_reg(REG_TDBAL, (uint32_t)((uint64_t)tx_descriptors & 0xFFFFFFFF));
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write_reg(REG_TDBAH, (uint32_t)(((uint64_t)tx_descriptors >> 32) & 0xFFFFFFFF));
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write_reg(REG_TDLEN, ring_size);
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write_reg(REG_TDH, 0);
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write_reg(REG_TDT, 0);
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tx_cur = 0;
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write_reg(REG_TCTL, TCTL_EN | TCTL_PSP | (15 << 4) | (64 << 12));
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}
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void e1000e_init(void) {
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e1000e_pci_dev = pci_find_device(E1000E_VENDOR_INTEL, E1000E_DEV_82574L);
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if (!e1000e_pci_dev) {
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e1000e_pci_dev = pci_find_device(E1000E_VENDOR_INTEL, E1000E_DEV_82567LM);
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}
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if (!e1000e_pci_dev) {
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e1000e_pci_dev = pci_find_device(E1000E_VENDOR_INTEL, E1000E_DEV_I217);
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}
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if (!e1000e_pci_dev) {
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e1000e_pci_dev = pci_find_device(E1000E_VENDOR_INTEL, E1000E_DEV_I219);
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}
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if (!e1000e_pci_dev) {
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// Driver loaded in virtual ready mode
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is_online = false;
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return;
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}
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pci_enable_bus_mastering(e1000e_pci_dev);
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mmio_base = e1000e_pci_dev->bar[0] & ~0xF;
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e1000e_read_mac();
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e1000e_rx_init();
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e1000e_tx_init();
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// Link up & enable interrupts
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write_reg(REG_CTRL, read_reg(REG_CTRL) | (1 << 5) | (1 << 6)); // Auto-speed detection
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write_reg(REG_IMS, 0x1F6DC);
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is_online = true;
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printk(KERN_INFO "E1000E: Intel 82574L PCIe Gigabit NIC online (MAC: %02x:%02x:%02x:%02x:%02x:%02x)\n",
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mac_addr[0], mac_addr[1], mac_addr[2], mac_addr[3], mac_addr[4], mac_addr[5]);
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}
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int e1000e_send(const void* packet, uint16_t length) {
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if (!is_online || !packet || length == 0) return -1;
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e1000e_tx_desc_t* desc = &tx_descriptors[tx_cur];
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if (!(desc->status & 1)) {
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return -1; // Ring full
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}
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memcpy(tx_buffers[tx_cur], packet, length);
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desc->length = length;
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desc->cmd = (1 << 0) | (1 << 1) | (1 << 3); // EOP | IFCS | RS
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desc->status = 0;
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uint16_t old_cur = tx_cur;
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tx_cur = (tx_cur + 1) % NUM_TX_DESCRIPTORS;
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write_reg(REG_TDT, tx_cur);
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stats_tx_packets++;
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stats_tx_bytes += length;
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(void)old_cur;
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return 0;
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}
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int e1000e_poll(void* buffer, uint16_t max_len) {
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if (!is_online || !buffer) return 0;
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e1000e_rx_desc_t* desc = &rx_descriptors[rx_cur];
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if (!(desc->status & 1)) {
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return 0; // No packet ready
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}
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uint16_t len = desc->length;
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if (len > max_len) len = max_len;
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memcpy(buffer, rx_buffers[rx_cur], len);
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desc->status = 0;
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uint16_t old_cur = rx_cur;
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rx_cur = (rx_cur + 1) % NUM_RX_DESCRIPTORS;
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write_reg(REG_RDT, old_cur);
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stats_rx_packets++;
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stats_rx_bytes += len;
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return len;
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}
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void e1000e_get_mac(uint8_t* out_mac) {
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if (out_mac) memcpy(out_mac, mac_addr, 6);
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}
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bool e1000e_is_online(void) {
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return is_online;
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}
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void e1000e_dump_stats(void) {
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printk(ANSI_BRIGHT_CYAN "=== Intel e1000e PCIe Gigabit Network Adapter ===\n" ANSI_RESET);
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printk(" Device Status : %s\n", is_online ? ANSI_BRIGHT_GREEN "ONLINE (Gigabit Link Active)" ANSI_RESET : ANSI_YELLOW "STANDBY / NO HARDWARE" ANSI_RESET);
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printk(" MAC Address : %02x:%02x:%02x:%02x:%02x:%02x\n",
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mac_addr[0], mac_addr[1], mac_addr[2], mac_addr[3], mac_addr[4], mac_addr[5]);
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printk(" TX Packets : %llu (%llu bytes)\n", stats_tx_packets, stats_tx_bytes);
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printk(" RX Packets : %llu (%llu bytes)\n\n", stats_rx_packets, stats_rx_bytes);
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}
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