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feat(arch): Add AArch64 / ARMv8i CPU support, cross-compilation & Linux Kconfig TUI
- Implement AArch64 HAL, vector table (16 aligned vectors), GICv2, Generic Timer, Stage-1 MMU (39-bit VA), PL011 UART - Build unified multi-architecture abstraction layer in include/arch/arch.h - Create interactive Linux-like Kconfig TUI menuconfig in scripts/kconfig/menuconfig.py - Support make menuconfig, defconfig, x86_64_defconfig, aarch64_defconfig - Update master Makefile for cross-compiling x86_64 (x86_64-elf-) and AArch64 (aarch64-linux-gnu-) - Dynamic architecture awareness across printk, uname, neofetch, and LazyBox
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#include <arch/aarch64/timer.h>
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#include <arch/aarch64/gic.h>
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#include <kernel/timer.h>
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#include <kernel/printk.h>
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static uint64_t timer_ticks = 0;
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static uint64_t timer_freq = 62500000; // Standard 62.5MHz QEMU virt frequency
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static uint32_t tick_interval = 0;
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void aarch64_timer_handle_irq(void) {
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timer_ticks++;
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// Reset next comparator interval
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__asm__ volatile("msr cntv_tval_el0, %0" :: "r"((uint64_t)tick_interval));
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// Call generic kernel timer tick
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timer_tick();
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}
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static void gic_timer_wrapper(uint32_t irq) {
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(void)irq;
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aarch64_timer_handle_irq();
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}
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void aarch64_timer_init(uint32_t freq_hz) {
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if (freq_hz == 0) freq_hz = 100;
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__asm__ volatile("mrs %0, cntfrq_el0" : "=r"(timer_freq));
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tick_interval = (uint32_t)(timer_freq / freq_hz);
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// Register with GIC (PPI 27 = Virtual Timer IRQ)
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gic_register_handler(ARCH_TIMER_VIRT_IRQ, gic_timer_wrapper);
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// Set countdown and enable virtual timer
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__asm__ volatile("msr cntv_tval_el0, %0" :: "r"((uint64_t)tick_interval));
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uint64_t ctl = 1; // Enable=1, IMASK=0
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__asm__ volatile("msr cntv_ctl_el0, %0" :: "r"(ctl));
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printk(KERN_INFO "Timer: ARM Generic Arch Timer active (%u Hz, Base Clock: %llu MHz)\n",
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freq_hz, timer_freq / 1000000);
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}
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uint64_t aarch64_timer_get_ticks(void) {
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return timer_ticks;
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}
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uint64_t aarch64_timer_get_freq(void) {
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return timer_freq;
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}
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