Initial commit: SUB-OS 64-Bit Production Monolithic Operating System with LazyBox userland suite

include/arch/x86_64/cpuid.h

@@ -0,0 +1,30 @@
+#ifndef _ARCH_X86_64_CPUID_H
+#define _ARCH_X86_64_CPUID_H
+
+#include <stdint.h>
+#include <stdbool.h>
+
+typedef struct {
+    char vendor[13];
+    char model[49];
+    uint32_t family;
+    uint32_t model_id;
+    uint32_t stepping;
+    bool has_fpu;
+    bool has_tsc;
+    bool has_msr;
+    bool has_pae;
+    bool has_apic;
+    bool has_sse;
+    bool has_sse2;
+    bool has_sse3;
+    bool has_sse4_1;
+    bool has_sse4_2;
+    bool has_avx;
+    bool has_rdrand;
+} cpu_info_t;
+
+void cpuid_detect(cpu_info_t* info);
+const cpu_info_t* cpuid_get_info(void);
+
+#endif // _ARCH_X86_64_CPUID_H

include/arch/x86_64/gdt.h

@@ -0,0 +1,47 @@
+#ifndef _ARCH_X86_64_GDT_H
+#define _ARCH_X86_64_GDT_H
+
+#include <stdint.h>
+
+#define GDT_KERNEL_CODE 0x08
+#define GDT_KERNEL_DATA 0x10
+#define GDT_USER_CODE   0x18
+#define GDT_USER_DATA   0x20
+#define GDT_TSS         0x28
+
+typedef struct {
+    uint16_t limit_low;
+    uint16_t base_low;
+    uint8_t  base_middle;
+    uint8_t  access;
+    uint8_t  granularity;
+    uint8_t  base_high;
+} __attribute__((packed)) gdt_entry_t;
+
+typedef struct {
+    uint16_t limit;
+    uint64_t base;
+} __attribute__((packed)) gdt_ptr_t;
+
+typedef struct {
+    uint32_t reserved0;
+    uint64_t rsp0;
+    uint64_t rsp1;
+    uint64_t rsp2;
+    uint64_t reserved1;
+    uint64_t ist1;
+    uint64_t ist2;
+    uint64_t ist3;
+    uint64_t ist4;
+    uint64_t ist5;
+    uint64_t ist6;
+    uint64_t ist7;
+    uint64_t reserved2;
+    uint16_t reserved3;
+    uint16_t iomap_base;
+} __attribute__((packed)) tss_entry_t;
+
+void gdt_init(void);
+void gdt_set_kernel_stack(uint64_t stack);
+
+#endif // _ARCH_X86_64_GDT_H

include/arch/x86_64/idt.h

@@ -0,0 +1,28 @@
+#ifndef _ARCH_X86_64_IDT_H
+#define _ARCH_X86_64_IDT_H
+
+#include <stdint.h>
+
+#define IDT_ENTRIES 256
+
+typedef struct {
+    uint16_t isr_low;
+    uint16_t kernel_cs;
+    uint8_t  ist;
+    uint8_t  attributes;
+    uint16_t isr_mid;
+    uint32_t isr_high;
+    uint32_t reserved;
+} __attribute__((packed)) idt_entry_t;
+
+typedef struct {
+    uint16_t limit;
+    uint64_t base;
+} __attribute__((packed)) idt_ptr_t;
+
+void idt_init(void);
+void idt_set_gate(uint8_t vector, void* isr, uint8_t flags);
+void idt_enable_gate(uint8_t vector);
+void idt_disable_gate(uint8_t vector);
+
+#endif // _ARCH_X86_64_IDT_H

include/arch/x86_64/io.h

@@ -0,0 +1,52 @@
+#ifndef _ARCH_X86_64_IO_H
+#define _ARCH_X86_64_IO_H
+
+#include <stdint.h>
+
+static inline void outb(uint16_t port, uint8_t val) {
+    __asm__ volatile ("outb %0, %1" : : "a"(val), "Nd"(port));
+}
+
+static inline uint8_t inb(uint16_t port) {
+    uint8_t ret;
+    __asm__ volatile ("inb %1, %0" : "=a"(ret) : "Nd"(port));
+    return ret;
+}
+
+static inline void outw(uint16_t port, uint16_t val) {
+    __asm__ volatile ("outw %0, %1" : : "a"(val), "Nd"(port));
+}
+
+static inline uint16_t inw(uint16_t port) {
+    uint16_t ret;
+    __asm__ volatile ("inw %1, %0" : "=a"(ret) : "Nd"(port));
+    return ret;
+}
+
+static inline void outl(uint16_t port, uint32_t val) {
+    __asm__ volatile ("outl %0, %1" : : "a"(val), "Nd"(port));
+}
+
+static inline uint32_t inl(uint16_t port) {
+    uint32_t ret;
+    __asm__ volatile ("inl %1, %0" : "=a"(ret) : "Nd"(port));
+    return ret;
+}
+
+static inline void io_wait(void) {
+    outb(0x80, 0);
+}
+
+static inline void cli(void) {
+    __asm__ volatile ("cli");
+}
+
+static inline void sti(void) {
+    __asm__ volatile ("sti");
+}
+
+static inline void hlt(void) {
+    __asm__ volatile ("hlt");
+}
+
+#endif // _ARCH_X86_64_IO_H

include/arch/x86_64/isr.h

@@ -0,0 +1,19 @@
+#ifndef _ARCH_X86_64_ISR_H
+#define _ARCH_X86_64_ISR_H
+
+#include <stdint.h>
+
+typedef struct {
+    uint64_t r15, r14, r13, r12, r11, r10, r9, r8;
+    uint64_t rbp, rdi, rsi, rdx, rcx, rbx, rax;
+    uint64_t int_no, error_code;
+    uint64_t rip, cs, rflags, rsp, ss;
+} __attribute__((packed)) registers_t;
+
+typedef void (*isr_handler_t)(registers_t*);
+
+void isr_init(void);
+void isr_register_handler(uint8_t int_no, isr_handler_t handler);
+void isr_unregister_handler(uint8_t int_no);
+
+#endif // _ARCH_X86_64_ISR_H

include/arch/x86_64/paging.h

@@ -0,0 +1,25 @@
+#ifndef _ARCH_X86_64_PAGING_H
+#define _ARCH_X86_64_PAGING_H
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#define PAGE_SIZE       4096
+#define PAGE_PRESENT    (1ULL << 0)
+#define PAGE_WRITABLE   (1ULL << 1)
+#define PAGE_USER       (1ULL << 2)
+#define PAGE_HUGE       (1ULL << 7)
+#define PAGE_NX         (1ULL << 63)
+
+typedef uint64_t pml4e_t;
+typedef uint64_t pdpte_t;
+typedef uint64_t pde_t;
+typedef uint64_t pte_t;
+
+void paging_init(void);
+void paging_map_page(uint64_t virt, uint64_t phys, uint64_t flags);
+void paging_unmap_page(uint64_t virt);
+uint64_t paging_get_phys(uint64_t virt);
+void paging_flush_tlb_single(uint64_t virt);
+
+#endif // _ARCH_X86_64_PAGING_H

include/arch/x86_64/pic.h

@@ -0,0 +1,12 @@
+#ifndef _ARCH_X86_64_PIC_H
+#define _ARCH_X86_64_PIC_H
+
+#include <stdint.h>
+
+void pic_init(void);
+void pic_send_eoi(uint8_t irq);
+void pic_set_mask(uint8_t irq);
+void pic_clear_mask(uint8_t irq);
+void pic_disable(void);
+
+#endif // _ARCH_X86_64_PIC_H

include/arch/x86_64/pit.h

@@ -0,0 +1,11 @@
+#ifndef _ARCH_X86_64_PIT_H
+#define _ARCH_X86_64_PIT_H
+
+#include <stdint.h>
+
+void pit_init(uint32_t frequency);
+uint64_t pit_get_ticks(void);
+uint64_t pit_get_uptime_ms(void);
+void pit_sleep(uint32_t milliseconds);
+
+#endif // _ARCH_X86_64_PIT_H