mirror of
https://github.com/subhobhai943/SUB-OS.git
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subhobhai943
70d5925b16
- Implement AArch64 HAL, vector table (16 aligned vectors), GICv2, Generic Timer, Stage-1 MMU (39-bit VA), PL011 UART - Build unified multi-architecture abstraction layer in include/arch/arch.h - Create interactive Linux-like Kconfig TUI menuconfig in scripts/kconfig/menuconfig.py - Support make menuconfig, defconfig, x86_64_defconfig, aarch64_defconfig - Update master Makefile for cross-compiling x86_64 (x86_64-elf-) and AArch64 (aarch64-linux-gnu-) - Dynamic architecture awareness across printk, uname, neofetch, and LazyBox
107 lines
2.4 KiB
ArmAsm
107 lines
2.4 KiB
ArmAsm
/*
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* SUB-OS AArch64 / ARMv8 Bootstrap Entry Point
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* Handles EL2/EL3 -> EL1 drop, sets up stack, zeroes BSS, and jumps to kernel_main_aarch64
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*/
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.section ".text.boot"
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.global _start
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.global aarch64_entry
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_start:
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aarch64_entry:
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// Early UART debug ping
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mov x0, #0x09000000
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mov w1, #'['
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str w1, [x0]
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mov w1, #'S'
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str w1, [x0]
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mov w1, #'U'
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str w1, [x0]
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mov w1, #'B'
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str w1, [x0]
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mov w1, #'-'
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str w1, [x0]
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mov w1, #'O'
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str w1, [x0]
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mov w1, #'S'
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str w1, [x0]
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mov w1, #']'
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str w1, [x0]
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mov w1, #'\n'
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str w1, [x0]
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// 1. Primary Core Check (Core 0 proceeds, other cores halt)
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mrs x0, mpidr_el1
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and x0, x0, #0xFF
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cbz x0, .primary_core
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.secondary_halt:
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wfe
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b .secondary_halt
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.primary_core:
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// 2. Check current Exception Level (EL)
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mrs x0, CurrentEL
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lsr x0, x0, #2
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cmp x0, #2
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b.eq .from_el2
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cmp x0, #3
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b.eq .from_el3
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b .in_el1
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.from_el3:
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// Setup Secure Configuration Register (SCR_EL3)
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mov x0, #(1 << 10) // RW=1 (64-bit execution in EL2/EL1)
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orr x0, x0, #(1 << 0) // NS=1 (Non-secure)
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msr scr_el3, x0
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mov x0, #0b01001 // EL2h mode with DAIF masked
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msr spsr_el3, x0
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adr x0, .from_el2
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msr elr_el3, x0
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eret
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.from_el2:
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// Setup Hypervisor Configuration Register (HCR_EL2)
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mov x0, #(1 << 31) // RW=1 (64-bit execution in EL1)
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msr hcr_el2, x0
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// Setup SPSR_EL2 for drop to EL1h (EL1 with dedicated SP_EL1)
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mov x0, #0b00101 // M[3:0] = 0101 (EL1h)
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orr x0, x0, #(0xF << 6) // Mask DAIF
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msr spsr_el2, x0
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adr x0, .in_el1
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msr elr_el2, x0
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eret
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.in_el1:
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// Enable Floating-Point and Advanced SIMD (NEON) in EL1
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mov x0, #(3 << 20)
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msr cpacr_el1, x0
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isb
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// 3. Set up Kernel Stack (64 KB dedicated EL1 stack)
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ldr x0, =stack_top
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mov sp, x0
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// 4. Enable Vector Table
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ldr x0, =vectors
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msr vbar_el1, x0
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// 5. Zero out BSS
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ldr x0, =__bss_start
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ldr x1, =__bss_end
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.bss_loop:
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cmp x0, x1
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b.ge .bss_done
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str xzr, [x0], #8
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b .bss_loop
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.bss_done:
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// 6. Jump to AArch64 C Entry
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bl kernel_main_aarch64
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.hang:
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wfi
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b .hang
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