Files
SUB-OS/include/arch/aarch64/mmu.h
T
subhobhai943 70d5925b16 feat(arch): Add AArch64 / ARMv8i CPU support, cross-compilation & Linux Kconfig TUI
- Implement AArch64 HAL, vector table (16 aligned vectors), GICv2, Generic Timer, Stage-1 MMU (39-bit VA), PL011 UART
- Build unified multi-architecture abstraction layer in include/arch/arch.h
- Create interactive Linux-like Kconfig TUI menuconfig in scripts/kconfig/menuconfig.py
- Support make menuconfig, defconfig, x86_64_defconfig, aarch64_defconfig
- Update master Makefile for cross-compiling x86_64 (x86_64-elf-) and AArch64 (aarch64-linux-gnu-)
- Dynamic architecture awareness across printk, uname, neofetch, and LazyBox
2026-08-18 10:50:58 +05:30

40 lines
1.1 KiB
C

#ifndef _ARCH_AARCH64_MMU_H
#define _ARCH_AARCH64_MMU_H
#include <stdint.h>
#include <stdbool.h>
#define MMU_PAGE_SIZE 4096
// Memory Types / Attributes index for MAIR_EL1
#define MT_DEVICE_nGnRnE 0
#define MT_NORMAL_NC 1
#define MT_NORMAL_WB 2
#define MAIR_DEVICE_nGnRnE 0x00
#define MAIR_NORMAL_NC 0x44
#define MAIR_NORMAL_WB 0xFF
#define MAIR_VAL ((MAIR_DEVICE_nGnRnE << (MT_DEVICE_nGnRnE * 8)) | \
(MAIR_NORMAL_NC << (MT_NORMAL_NC * 8)) | \
(MAIR_NORMAL_WB << (MT_NORMAL_WB * 8)))
// Page descriptor bits
#define PTE_VALID (1ULL << 0)
#define PTE_TABLE (1ULL << 1)
#define PTE_BLOCK (0ULL << 1)
#define PTE_USER (1ULL << 6)
#define PTE_RO (1ULL << 7)
#define PTE_SH_INNER (3ULL << 8)
#define PTE_AF (1ULL << 10)
#define PTE_NG (1ULL << 11)
#define PTE_PXN (1ULL << 53)
#define PTE_UXN (1ULL << 54)
#define PTE_ATTRINDX(x) (((uint64_t)(x)) << 2)
void aarch64_mmu_init(void);
void aarch64_mmu_map_2mb(uint64_t virt_addr, uint64_t phys_addr, uint32_t mem_type);
#endif // _ARCH_AARCH64_MMU_H