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https://github.com/subhobhai943/SUB-OS.git
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- Support ARMv8i / ARM32 (AArch32) baremetal target with arm-linux-gnueabihf toolchain - Implement ARMv8i boot entry point, banked exception mode stacks (IRQ, ABT, UND, SVC) - Implement 8 exception vectors, GICv2 distributor/CPU interface, CP15 Generic Timer (100 Hz), flat Section MMU - Support PL011 UART for early console & interactive LazyBox TTY input - Update Makefile with make armv8i_defconfig and automated cross-compilation - Update scripts/kconfig/menuconfig.py with dedicated armv8i options
51 lines
1.1 KiB
C
51 lines
1.1 KiB
C
#ifndef _KERNEL_SYNC_H
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#define _KERNEL_SYNC_H
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#include <stdint.h>
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#include <stdbool.h>
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typedef struct {
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volatile uint32_t lock;
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} spinlock_t;
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#define SPINLOCK_INIT { .lock = 0 }
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static inline void spinlock_init(spinlock_t* lock) {
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lock->lock = 0;
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}
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static inline void spin_lock(spinlock_t* lock) {
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#if defined(__x86_64__)
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while (__atomic_test_and_set(&lock->lock, __ATOMIC_ACQUIRE)) {
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__asm__ volatile ("pause");
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}
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#elif defined(__aarch64__)
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while (__atomic_test_and_set(&lock->lock, __ATOMIC_ACQUIRE)) {
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__asm__ volatile ("yield");
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}
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#elif defined(__arm__) || defined(__armv8i__)
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while (__atomic_test_and_set(&lock->lock, __ATOMIC_ACQUIRE)) {
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__asm__ volatile ("nop");
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}
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#else
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while (__atomic_test_and_set(&lock->lock, __ATOMIC_ACQUIRE)) {
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__asm__ volatile ("");
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}
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#endif
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}
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static inline void spin_unlock(spinlock_t* lock) {
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__atomic_clear(&lock->lock, __ATOMIC_RELEASE);
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}
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typedef struct {
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spinlock_t lock;
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volatile int count;
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} semaphore_t;
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void sem_init(semaphore_t* sem, int value);
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void sem_wait(semaphore_t* sem);
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void sem_post(semaphore_t* sem);
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#endif // _KERNEL_SYNC_H
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