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Claude
a14a7c79b0
Replace the state-relabel-only round-robin with the SUB-OS "Weave" scheduler backed by a genuine callee-saved context switch. Threads now actually run on their own kernel stacks instead of merely having their state field rewritten. What was implemented: - sub_ctx_switch(): per-arch assembly (arch/x86_64/cpu/switch.asm, arch/aarch64/cpu/switch.S, arch/armv8i/cpu/switch.S) that saves/restores the callee-saved register set (+ flags on x86_64) on each thread's own stack, plus a first-run trampoline (sub_thread_trampoline) that launches a freshly forged thread frame with entry/arg in callee-saved registers. - task_forge_frame(): builds the initial saved-context frame per arch so the very first switch into a new thread lands on the trampoline; task_t gains a pointer-sized ctx_sp so the same struct works on 64- and 32-bit. - Weave policy (kernel/sched.c): WEAVE_NLANES priority lanes, always dispatch the lowest non-empty lane round-robin; a task that yields voluntarily is woven UP a lane (interactive), one preempted after burning its quantum is woven DOWN (CPU-bound). Cooperative switching (sched_yield / task_exit) is always live; timer-driven preemption is gated behind sched_set_preempt() and left disarmed for now. - task_exit() now switches to the next runnable thread via sched_exit_current() instead of spinning/halting. - Boot-time weave_selftest() (x86_64) and sched_dump() diagnostics. How it was verified: - Builds clean for all three targets: x86_64 (CROSS_COMPILE=x86_64-linux-gnu-, RUSTC="rustc --target x86_64-unknown-none"), aarch64, armv8i. No new warnings; the new x86_64 asm carries a .note.GNU-stack section. - Booted x86_64 under QEMU (TCG): the self-test runs three cooperative kernel threads to completion on separate stacks with the expected 1->2->3 round-robin interleave, reports "20 real context switches, 3/3 workers exited", returns cleanly to the boot thread, and boot proceeds normally to ring-3 init and the shell. No fault/panic. Left unverified: - The aarch64/armv8i sub_ctx_switch frames build and link but are not yet boot-tested on their QEMU targets (tracked in docs/AUTODEV_ROADMAP.md). - Timer preemption path is implemented but disarmed; exited kernel threads currently leak their stack (reaper is next in the backlog). Co-Authored-By: Claude Opus 4.8 <[email protected]> Claude-Session: https://claude.ai/code/session_01Jk6K69yGS7zYgvoWd6nJxQ
56 lines
1.5 KiB
NASM
56 lines
1.5 KiB
NASM
[BITS 64]
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default rel
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; SUB-OS kernel context switch (x86_64)
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; -------------------------------------
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; sub_ctx_switch(void** save_sp /* rdi */, void* load_sp /* rsi */)
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;
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; Saves the SysV callee-saved registers plus RFLAGS of the outgoing thread onto
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; its own stack, stashes the resulting stack pointer through *save_sp, then
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; loads the incoming thread's stack pointer and unwinds the mirror image. From
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; C this looks like an ordinary call that "returns" only when this thread is
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; later switched back in. Caller-saved registers are the C caller's problem, as
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; usual, so nothing else needs preserving here.
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global sub_ctx_switch
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global sub_thread_trampoline
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extern task_exit
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section .text
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sub_ctx_switch:
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push rbp
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push rbx
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push r12
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push r13
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push r14
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push r15
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pushfq
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mov [rdi], rsp ; *save_sp = outgoing stack pointer
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mov rsp, rsi ; adopt the incoming stack
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popfq
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pop r15
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pop r14
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pop r13
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pop r12
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pop rbx
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pop rbp
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ret
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; First-run trampoline. task_create() forges an initial frame so that the very
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; first switch into a fresh thread lands here with r12 = entry, r13 = argument.
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; We call the entry function, and if it ever returns we retire the thread.
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sub_thread_trampoline:
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mov rdi, r13 ; arg
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call r12 ; entry(arg)
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xor rdi, rdi ; void entry -> exit code 0
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call task_exit
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.hang:
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hlt
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jmp .hang
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section .note.GNU-stack noalloc noexec nowrite progbits
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