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- Add dedicated Linux-compatible Tree visualizer with UTF-8/ASCII branch tracking, -L depth filtering, human sizes, and permissions in userland/lazybox/tree.c - Implement Hardware Invariant Timestamp Counter (TSC) calibration and microsecond delay timer in kernel/tsc.c and include/kernel/tsc.h - Add Virtual Terminal color palette, live resource utilization bars, and logo banner in kernel/vt_art.c and include/kernel/vt_art.h - Add LazyBox applets: 'tree', 'tscinfo', and 'vtart' - Update README.md documentation and command matrix
87 lines
2.8 KiB
C
87 lines
2.8 KiB
C
// High-Resolution Timestamp Counter (TSC) & Nanosecond Timing Subsystem
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#include <kernel/tsc.h>
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#include <kernel/printk.h>
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#include <kernel/timer.h>
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static uint64_t g_tsc_khz = 2400000; // Default: 2.4 GHz estimate
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static bool g_tsc_available = true;
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uint64_t tsc_read(void) {
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#if defined(__x86_64__)
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uint32_t lo, hi;
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__asm__ __volatile__("rdtsc" : "=a"(lo), "=d"(hi));
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return ((uint64_t)hi << 32) | lo;
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#elif defined(__aarch64__)
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uint64_t val;
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__asm__ __volatile__("mrs %0, cntvct_el0" : "=r"(val));
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return val;
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#elif defined(__arm__)
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uint32_t lo, hi;
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__asm__ __volatile__("mrrc p15, 1, %0, %1, c14" : "=r"(lo), "=r"(hi));
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return ((uint64_t)hi << 32) | lo;
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#else
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return timer_get_ticks() * 1000000;
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#endif
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}
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void tsc_init(void) {
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#if defined(__x86_64__)
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// Calibrate TSC using I/O bus delay loop (~1us per outb 0x80)
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uint64_t t1 = tsc_read();
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for (volatile int i = 0; i < 10000; i++) {
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__asm__ __volatile__("outb %%al, $0x80" : : "a"(0));
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}
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uint64_t t2 = tsc_read();
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uint64_t diff = (t2 > t1) ? (t2 - t1) : 24000000;
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uint64_t calculated_khz = diff / 10;
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if (calculated_khz > 100000 && calculated_khz < 10000000) {
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g_tsc_khz = calculated_khz;
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} else {
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g_tsc_khz = 2400000;
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}
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#elif defined(__aarch64__)
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uint64_t freq;
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__asm__ __volatile__("mrs %0, cntfrq_el0" : "=r"(freq));
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if (freq > 0) g_tsc_khz = freq / 1000;
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#endif
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printk(KERN_INFO "TSC: Invariant Timestamp Counter online (Calibrated: %llu.%03llu MHz)\n",
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g_tsc_khz / 1000, g_tsc_khz % 1000);
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}
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uint64_t tsc_get_khz(void) {
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return g_tsc_khz;
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}
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uint64_t tsc_to_ns(uint64_t cycles) {
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if (g_tsc_khz == 0) return 0;
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return (cycles * 1000000) / g_tsc_khz;
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}
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uint64_t tsc_to_us(uint64_t cycles) {
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if (g_tsc_khz == 0) return 0;
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return (cycles * 1000) / g_tsc_khz;
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}
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void tsc_udelay(uint32_t microseconds) {
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uint64_t start = tsc_read();
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uint64_t cycles_needed = ((uint64_t)microseconds * g_tsc_khz) / 1000;
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while ((tsc_read() - start) < cycles_needed) {
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#if defined(__x86_64__)
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__asm__ __volatile__("pause");
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#elif defined(__aarch64__) || defined(__arm__)
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__asm__ __volatile__("yield");
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#endif
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}
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}
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void tsc_dump_info(void) {
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uint64_t now = tsc_read();
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printk(ANSI_BRIGHT_CYAN "=== Hardware Timestamp Counter (TSC) Telemetry ===\n" ANSI_RESET);
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printk(" Available : " ANSI_BRIGHT_GREEN "%s\n" ANSI_RESET, g_tsc_available ? "YES (Invariant TSC)" : "NO");
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printk(" Calibrated Clock : \x1b[93m%llu.%03llu MHz\x1b[0m (%llu kHz)\n", g_tsc_khz / 1000, g_tsc_khz % 1000, g_tsc_khz);
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printk(" Raw Cycles : \x1b[92m%llu cycles\x1b[0m\n", now);
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printk(" Resolution : \x1b[96m~%llu ns per cycle\x1b[0m\n\n", 1000000 / (g_tsc_khz ? g_tsc_khz : 1));
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}
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