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- Support ARMv8i / ARM32 (AArch32) baremetal target with arm-linux-gnueabihf toolchain - Implement ARMv8i boot entry point, banked exception mode stacks (IRQ, ABT, UND, SVC) - Implement 8 exception vectors, GICv2 distributor/CPU interface, CP15 Generic Timer (100 Hz), flat Section MMU - Support PL011 UART for early console & interactive LazyBox TTY input - Update Makefile with make armv8i_defconfig and automated cross-compilation - Update scripts/kconfig/menuconfig.py with dedicated armv8i options
76 lines
2.0 KiB
C
76 lines
2.0 KiB
C
#ifndef _ARCH_ARMV8I_IO_H
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#define _ARCH_ARMV8I_IO_H
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#include <stdint.h>
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static inline void mmio_write8(uintptr_t reg, uint8_t val) {
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*(volatile uint8_t*)reg = val;
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}
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static inline uint8_t mmio_read8(uintptr_t reg) {
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return *(volatile uint8_t*)reg;
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}
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static inline void mmio_write16(uintptr_t reg, uint16_t val) {
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*(volatile uint16_t*)reg = val;
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}
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static inline uint16_t mmio_read16(uintptr_t reg) {
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return *(volatile uint16_t*)reg;
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}
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static inline void mmio_write32(uintptr_t reg, uint32_t val) {
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*(volatile uint32_t*)reg = val;
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}
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static inline uint32_t mmio_read32(uintptr_t reg) {
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return *(volatile uint32_t*)reg;
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}
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static inline void mmio_write64(uintptr_t reg, uint64_t val) {
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*(volatile uint32_t*)reg = (uint32_t)(val & 0xFFFFFFFF);
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*(volatile uint32_t*)(reg + 4) = (uint32_t)(val >> 32);
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}
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static inline uint64_t mmio_read64(uintptr_t reg) {
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uint32_t low = *(volatile uint32_t*)reg;
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uint32_t high = *(volatile uint32_t*)(reg + 4);
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return ((uint64_t)high << 32) | low;
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}
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// Memory barriers
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static inline void dsb(void) {
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__asm__ volatile("dsb" ::: "memory");
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}
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static inline void dmb(void) {
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__asm__ volatile("dmb" ::: "memory");
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}
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static inline void isb(void) {
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__asm__ volatile("isb" ::: "memory");
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}
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// x86 Port I/O Stubs
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static inline void outb(uint16_t port, uint8_t val) { (void)port; (void)val; }
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static inline uint8_t inb(uint16_t port) { (void)port; return 0; }
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static inline void outw(uint16_t port, uint16_t val) { (void)port; (void)val; }
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static inline uint16_t inw(uint16_t port) { (void)port; return 0; }
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static inline void outl(uint16_t port, uint32_t val) { (void)port; (void)val; }
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static inline uint32_t inl(uint16_t port) { (void)port; return 0; }
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static inline void io_wait(void) { __asm__ volatile("nop"); }
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static inline void cli(void) {
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__asm__ volatile("cpsid i" ::: "memory");
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}
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static inline void sti(void) {
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__asm__ volatile("cpsie i" ::: "memory");
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}
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static inline void hlt(void) {
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__asm__ volatile("wfi");
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}
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#endif // _ARCH_ARMV8I_IO_H
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