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https://github.com/subhobhai943/SUB-OS.git
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subhobhai943
7b646c8cc4
- Support ARMv8i / ARM32 (AArch32) baremetal target with arm-linux-gnueabihf toolchain - Implement ARMv8i boot entry point, banked exception mode stacks (IRQ, ABT, UND, SVC) - Implement 8 exception vectors, GICv2 distributor/CPU interface, CP15 Generic Timer (100 Hz), flat Section MMU - Support PL011 UART for early console & interactive LazyBox TTY input - Update Makefile with make armv8i_defconfig and automated cross-compilation - Update scripts/kconfig/menuconfig.py with dedicated armv8i options
69 lines
1.8 KiB
C
69 lines
1.8 KiB
C
#include <arch/armv8i/arch.h>
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#include <arch/armv8i/gic.h>
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#include <arch/armv8i/timer.h>
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#include <arch/armv8i/uart.h>
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#include <kernel/printk.h>
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typedef struct {
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uint32_t r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11, r12;
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uint32_t lr;
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uint32_t spsr;
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} armv8i_registers_t;
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static void hex_to_str(uint32_t val, char* out) {
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const char hex_chars[] = "0123456789ABCDEF";
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out[0] = '0'; out[1] = 'x';
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for (int i = 7; i >= 0; i--) {
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out[2 + (7 - i)] = hex_chars[(val >> (i * 4)) & 0xF];
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}
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out[10] = '\0';
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}
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void armv8i_undef_handler(armv8i_registers_t* regs) {
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char buf[16];
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hex_to_str(regs->lr, buf);
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uart_pl011_puts("\n[KERNEL PANIC] ARMv8i Undefined Instruction at PC=");
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uart_pl011_puts(buf);
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uart_pl011_puts("\n");
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while (1) { __asm__ volatile("wfi"); }
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}
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void armv8i_svc_handler(armv8i_registers_t* regs) {
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(void)regs;
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}
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void armv8i_pabt_handler(armv8i_registers_t* regs) {
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char buf[16];
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hex_to_str(regs->lr, buf);
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uart_pl011_puts("\n[KERNEL PANIC] ARMv8i Prefetch Abort at PC=");
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uart_pl011_puts(buf);
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uart_pl011_puts("\n");
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while (1) { __asm__ volatile("wfi"); }
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}
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void armv8i_dabt_handler(armv8i_registers_t* regs) {
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char buf[16];
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hex_to_str(regs->lr, buf);
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uart_pl011_puts("\n[KERNEL PANIC] ARMv8i Data Abort at PC=");
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uart_pl011_puts(buf);
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uart_pl011_puts("\n");
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while (1) { __asm__ volatile("wfi"); }
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}
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void armv8i_irq_handler(armv8i_registers_t* regs) {
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(void)regs;
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uint32_t iar = *(volatile uint32_t*)GICC_IAR;
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uint32_t irq = iar & 0x3FF;
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if (irq < 1020) {
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if (irq == ARMV8I_TIMER_VIRT_IRQ) {
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armv8i_timer_handle_irq();
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}
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*(volatile uint32_t*)GICC_EOIR = iar;
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}
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}
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void armv8i_fiq_handler(armv8i_registers_t* regs) {
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(void)regs;
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}
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