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subhobhai943
7b646c8cc4
- Support ARMv8i / ARM32 (AArch32) baremetal target with arm-linux-gnueabihf toolchain - Implement ARMv8i boot entry point, banked exception mode stacks (IRQ, ABT, UND, SVC) - Implement 8 exception vectors, GICv2 distributor/CPU interface, CP15 Generic Timer (100 Hz), flat Section MMU - Support PL011 UART for early console & interactive LazyBox TTY input - Update Makefile with make armv8i_defconfig and automated cross-compilation - Update scripts/kconfig/menuconfig.py with dedicated armv8i options
138 lines
3.2 KiB
C
138 lines
3.2 KiB
C
#ifndef _ARCH_ARCH_H
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#define _ARCH_ARCH_H
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#include <stdint.h>
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#include <stdbool.h>
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#if defined(__x86_64__)
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#define ARCH_NAME "x86_64"
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#define ARCH_IS_64BIT 1
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#include <arch/x86_64/gdt.h>
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#include <arch/x86_64/idt.h>
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#include <arch/x86_64/isr.h>
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#include <arch/x86_64/pic.h>
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#include <arch/x86_64/pit.h>
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#include <arch/x86_64/cpuid.h>
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#include <arch/x86_64/paging.h>
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#include <arch/x86_64/io.h>
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static inline void arch_enable_interrupts(void) {
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__asm__ volatile("sti");
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}
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static inline void arch_disable_interrupts(void) {
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__asm__ volatile("cli");
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}
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static inline void arch_halt(void) {
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__asm__ volatile("hlt");
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}
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static inline void arch_wait_for_interrupt(void) {
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__asm__ volatile("sti; hlt");
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}
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static inline uint64_t arch_get_ticks(void) {
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return pit_get_ticks();
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}
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static inline void arch_sleep(uint32_t ms) {
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pit_sleep(ms);
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}
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#elif defined(__aarch64__) || defined(__arm64__)
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#define ARCH_NAME "aarch64"
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#define ARCH_IS_64BIT 1
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#include <arch/aarch64/arch.h>
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#include <arch/aarch64/cpu.h>
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#include <arch/aarch64/gic.h>
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#include <arch/aarch64/timer.h>
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#include <arch/aarch64/mmu.h>
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#include <arch/aarch64/uart.h>
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#include <arch/aarch64/io.h>
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static inline void arch_enable_interrupts(void) {
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__asm__ volatile("msr daifclr, #2" ::: "memory");
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}
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static inline void arch_disable_interrupts(void) {
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__asm__ volatile("msr daifset, #2" ::: "memory");
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}
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static inline void arch_halt(void) {
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__asm__ volatile("wfi");
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}
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static inline void arch_wait_for_interrupt(void) {
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__asm__ volatile("msr daifclr, #2; wfi" ::: "memory");
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}
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static inline uint64_t arch_get_ticks(void) {
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return aarch64_timer_get_ticks();
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}
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static inline void arch_sleep(uint32_t ms) {
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uint64_t count = (ms > 10) ? (ms / 10) : 1;
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uint64_t target = aarch64_timer_get_ticks() + count;
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while (aarch64_timer_get_ticks() < target) {
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__asm__ volatile("wfi");
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}
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}
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uint64_t pit_get_ticks(void);
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void pit_sleep(uint32_t ms);
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#elif defined(__arm__) || defined(__armv8i__)
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#define ARCH_NAME "armv8i"
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#define ARCH_IS_64BIT 0
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#include <arch/armv8i/arch.h>
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#include <arch/armv8i/cpu.h>
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#include <arch/armv8i/gic.h>
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#include <arch/armv8i/timer.h>
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#include <arch/armv8i/mmu.h>
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#include <arch/armv8i/uart.h>
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#include <arch/armv8i/io.h>
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static inline void arch_enable_interrupts(void) {
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__asm__ volatile("cpsie i" ::: "memory");
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}
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static inline void arch_disable_interrupts(void) {
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__asm__ volatile("cpsid i" ::: "memory");
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}
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static inline void arch_halt(void) {
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__asm__ volatile("wfi");
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}
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static inline void arch_wait_for_interrupt(void) {
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__asm__ volatile("cpsie i; wfi" ::: "memory");
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}
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static inline uint64_t arch_get_ticks(void) {
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return armv8i_timer_get_ticks();
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}
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static inline void arch_sleep(uint32_t ms) {
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uint64_t count = (ms > 10) ? (ms / 10) : 1;
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uint64_t target = armv8i_timer_get_ticks() + count;
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while (armv8i_timer_get_ticks() < target) {
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__asm__ volatile("wfi");
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}
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}
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uint64_t pit_get_ticks(void);
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void pit_sleep(uint32_t ms);
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#else
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#error "Unsupported Target CPU Architecture!"
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#endif
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// Generic Architecture API
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void arch_early_init(void);
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void arch_init(void);
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const char* arch_get_name(void);
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uint32_t arch_get_cpu_id(void);
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#endif // _ARCH_ARCH_H
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